tft lcd driving circuit quotation

A fully digital driving circuit for thin-film transistor liquid crystal display can offer benefits, including less power consumption and a shortened design schedule. Using the pulsewidth signal to control the moment to stop the ramp voltage, the pixel voltage can be set accurately. In this paper, the possible issues of power consumption, device nonuniformity, and parasitic capacitance are well-studied to prove the feasibility and advantages of the digital driving method. It is prospectively expected to substitute for the conventional analog driving method in the future.

Due to the limited silicon area, the proposed LCD column driver has only four channels. The 10-bit LCD column driver with R-DAC and C-DAC was fabricated using a 0.35-μm 5-V CMOS technology. Table I shows the device sizes used in the proposed column driver, where Rtop, Rmid, Rbot, and Ri are designated in Figure 7. Figure 12 is a photograph of the die. Except for the resistor string of the R-DAC, the die area is 0.2×1.26 mm2 for four channels. Each RGB digital input code is 10-bits wide.

The Differential Nonlinearity (DNL) and Integral Nonlinearity (INL) are typically measured for a DAC. However, it is difficult to determine these two specifications for a nonlinear DAC. To demonstrate the performance of the proposed circuit, the nonlinear gamma voltages are not applied to the R-string and the resistor values of the resistor string are made equal. Since an LCD panel needs several column drivers, the uniformity of different drivers is very important. Figure 13 shows the measured transfer curves of a DAC for eight off-chip column drivers. To show the deviation between different chips, Figure 14 provides an

enlarged view of the transfer curves, where the maximum deviation is 3.5 mV from the mean. This deviation is mainly due to process variations. The approach in this study uses no error correction. Hence, the deviation can be reduced by applying an offset canceling technique to the buffer amplifier. Figures 15(a) and (b) show the DNL values for positive and negative polarities, respectively. Figures 16(a) and (b) show the INL values for positive and negative polarities, respectively. The combination of R-DACs and C-DACs creates two groups of DNL values. The maximum DNL and INL values are 3.83 and 3.84 LSB, respectively. This study uses a 1-LSB voltage of 2.44mV to calculate the INL and DNL values. The linearity, however, is less important than the deviations between off-chip drivers for LCD drivers [2].

Figure 17 shows the measured output waveforms of two neighboring channels under dot inversion for the RGB digital inputs of ‘1111111111.’ Here, the voltage levels for negative and positive polarities are 0.266 V and 4.75 V, respectively. A load resistor of 5 kΩ and a capacitor of 90 pF were used. Figure 18 shows a similar waveform for ‘0000000000’ inputs, where the corresponding voltage levels for negative and positive polarities are 2.425 V and 2.598 V, respectively. These two figures show that the settling time is within 3 μs, which is smaller than that of previously published work [2] and standard UXGA displays [5]. Table II summarizes the performance of the proposed column driver IC. The average area per channel is 0.063 mm2, which is smaller than the reported areas of fully R-DAC-based column drivers [5, 8]. These experimental results show that the proposed column driver is suitable for UXGA LCD-TV applications.

Abstract:A two-stage driving circuit of a one-chip TFT-LCD driver IC for portable electronic devices is proposed.The driving buffers of the new circuit are built in the γ-correction circuit rather than in the source driver.The power consumption,die area,and driving capability of the driving circuit are discussed in detail.For a two-stage driving circuit with 13 driving buffers,the settling time of the driving voltage within 0.2% error is about 19.2μs when 396 pixel-loads are driven by the same grayscale voltage.The quiescent current of the whole driving circuit is 518μA,and the power consumption can be reduced by 77%.The proposed driving circuit is successfully applied in a 132RGB×176-dot,260k color one-chip driver IC developed by us for the TFT-LCD of mobile phone,and it can also be used in other portable electronic devices, such as PDAs and digital cameras.

INT018ATFT is an embedded display driver board based on our 1.8 inch 128 x 160 RGB resolution TFT display module. Mounted on the embedded board is the RAIO RA8872 LCD controller that offers the following features and benefits:

INT028ATFT and INT028ATFT-TS are embedded display driver boards based on our 2.8 inch 240 x 320 RGB resolution TFT display module. Mounted on the embedded board is the RAIO RA8872 LCD controller that offers the following features and benefits:

Compared with ordinary LCDs, TFT LCDs provide very clear images/text with shorter response times. TFT LCDs are increasingly being used to bring better visual effects to products.

TFT stands for “thin film transistor”. The transistor of a color TFT LCD is composed of a thin film of amorphous silicon deposited on glass. It acts as a control valve to provide the appropriate voltage to the liquid crystal for each sub-pixel. This is why TFT LCDs are also known as active matrix displays.

TFT LCDs have a liquid crystal layer between a glass substrate formed by the TFT and transparent pixel electrodes and another glass substrate with a color filter (RGB) and a transparent counter electrode. Each pixel in the active matrix is paired with a transistor that includes a capacitor, which gives each sub-pixel the ability to retain its charge without sending a charge every time it needs to be replaced. This means that TFT LCDs are more responsive.

To understand how a TFT LCD works, we must first grasp the concept of a field effect transistor (FET), which is a transistor that uses an electric field to control the flow of current. It is a component with three terminals: source, gate and drain. fet controls the flow of current by applying a voltage to the gate, thereby changing the conductivity between the drain and source.

Using the FET, we can build a circuit as follows. The data bus sends a signal to the source of the FET, and when SEL SIGNAL applies a voltage to the gate, a drive voltage is generated on the TFT LCD panel. A sub-pixel is lit. A TFT LCD display contains thousands or millions of such driver circuits.

Color TFT LCD from 1.8 inch ~ 15 inch, there are different resolutions and interfaces. How to choose the right TFT LCD, you can refer to the previous article “LCD | How to choose a liquid crystal display module

ER-TFTV043-3 is 480x272 dots 4.3" color tft lcd module display with vga,video,av signal driver board,optional 4-wire resistive touch panel with USB driver board and cable,optional capacitive touch panel with USB controller board and cable,optional remote control,superior display quality,wide view angle.It can be used in any embedded systems,car,industrial device,security and hand-held equipment which requires display in high quality and colorful video.

A thin-film-transistor liquid-crystal display (TFT LCD) is a variant of a liquid-crystal display that uses thin-film-transistor technologyactive matrix LCD, in contrast to passive matrix LCDs or simple, direct-driven (i.e. with segments directly connected to electronics outside the LCD) LCDs with a few segments.

In February 1957, John Wallmark of RCA filed a patent for a thin film MOSFET. Paul K. Weimer, also of RCA implemented Wallmark"s ideas and developed the thin-film transistor (TFT) in 1962, a type of MOSFET distinct from the standard bulk MOSFET. It was made with thin films of cadmium selenide and cadmium sulfide. The idea of a TFT-based liquid-crystal display (LCD) was conceived by Bernard Lechner of RCA Laboratories in 1968. In 1971, Lechner, F. J. Marlowe, E. O. Nester and J. Tults demonstrated a 2-by-18 matrix display driven by a hybrid circuit using the dynamic scattering mode of LCDs.T. Peter Brody, J. A. Asars and G. D. Dixon at Westinghouse Research Laboratories developed a CdSe (cadmium selenide) TFT, which they used to demonstrate the first CdSe thin-film-transistor liquid-crystal display (TFT LCD).active-matrix liquid-crystal display (AM LCD) using CdSe TFTs in 1974, and then Brody coined the term "active matrix" in 1975.high-resolution and high-quality electronic visual display devices use TFT-based active matrix displays.

The circuit layout process of a TFT-LCD is very similar to that of semiconductor products. However, rather than fabricating the transistors from silicon, that is formed into a crystalline silicon wafer, they are made from a thin film of amorphous silicon that is deposited on a glass panel. The silicon layer for TFT-LCDs is typically deposited using the PECVD process.

Polycrystalline silicon is sometimes used in displays requiring higher TFT performance. Examples include small high-resolution displays such as those found in projectors or viewfinders. Amorphous silicon-based TFTs are by far the most common, due to their lower production cost, whereas polycrystalline silicon TFTs are more costly and much more difficult to produce.

The twisted nematic display is one of the oldest and frequently cheapest kind of LCD display technologies available. TN displays benefit from fast pixel response times and less smearing than other LCD display technology, but suffer from poor color reproduction and limited viewing angles, especially in the vertical direction. Colors will shift, potentially to the point of completely inverting, when viewed at an angle that is not perpendicular to the display. Modern, high end consumer products have developed methods to overcome the technology"s shortcomings, such as RTC (Response Time Compensation / Overdrive) technologies. Modern TN displays can look significantly better than older TN displays from decades earlier, but overall TN has inferior viewing angles and poor color in comparison to other technology.

The transmittance of a pixel of an LCD panel typically does not change linearly with the applied voltage,sRGB standard for computer monitors requires a specific nonlinear dependence of the amount of emitted light as a function of the RGB value.

Less expensive PVA panels often use dithering and FRC, whereas super-PVA (S-PVA) panels all use at least 8 bits per color component and do not use color simulation methods.BRAVIA LCD TVs offer 10-bit and xvYCC color support, for example, the Bravia X4500 series. S-PVA also offers fast response times using modern RTC technologies.

TFT dual-transistor pixel or cell technology is a reflective-display technology for use in very-low-power-consumption applications such as electronic shelf labels (ESL), digital watches, or metering. DTP involves adding a secondary transistor gate in the single TFT cell to maintain the display of a pixel during a period of 1s without loss of image or without degrading the TFT transistors over time. By slowing the refresh rate of the standard frequency from 60 Hz to 1 Hz, DTP claims to increase the power efficiency by multiple orders of magnitude.

Due to the very high cost of building TFT factories, there are few major OEM panel vendors for large display panels. The glass panel suppliers are as follows:

External consumer display devices like a TFT LCD feature one or more analog VGA, DVI, HDMI, or DisplayPort interface, with many featuring a selection of these interfaces. Inside external display devices there is a controller board that will convert the video signal using color mapping and image scaling usually employing the discrete cosine transform (DCT) in order to convert any video source like CVBS, VGA, DVI, HDMI, etc. into digital RGB at the native resolution of the display panel. In a laptop the graphics chip will directly produce a signal suitable for connection to the built-in TFT display. A control mechanism for the backlight is usually included on the same controller board.

The low level interface of STN, DSTN, or TFT display panels use either single ended TTL 5 V signal for older displays or TTL 3.3 V for slightly newer displays that transmits the pixel clock, horizontal sync, vertical sync, digital red, digital green, digital blue in parallel. Some models (for example the AT070TN92) also feature input/display enable, horizontal scan direction and vertical scan direction signals.

New and large (>15") TFT displays often use LVDS signaling that transmits the same contents as the parallel interface (Hsync, Vsync, RGB) but will put control and RGB bits into a number of serial transmission lines synchronized to a clock whose rate is equal to the pixel rate. LVDS transmits seven bits per clock per data line, with six bits being data and one bit used to signal if the other six bits need to be inverted in order to maintain DC balance. Low-cost TFT displays often have three data lines and therefore only directly support 18 bits per pixel. Upscale displays have four or five data lines to support 24 bits per pixel (truecolor) or 30 bits per pixel respectively. Panel manufacturers are slowly replacing LVDS with Internal DisplayPort and Embedded DisplayPort, which allow sixfold reduction of the number of differential pairs.

Kawamoto, H. (2012). "The Inventors of TFT Active-Matrix LCD Receive the 2011 IEEE Nishizawa Medal". Journal of Display Technology. 8 (1): 3–4. Bibcode:2012JDisT...8....3K. doi:10.1109/JDT.2011.2177740. ISSN 1551-319X.

Richard Ahrons (2012). "Industrial Research in Microcircuitry at RCA: The Early Years, 1953–1963". 12 (1). IEEE Annals of the History of Computing: 60–73. Cite journal requires |journal= (help)

K. H. Lee; H. Y. Kim; K. H. Park; S. J. Jang; I. C. Park & J. Y. Lee (June 2006). "A Novel Outdoor Readability of Portable TFT-LCD with AFFS Technology". SID Symposium Digest of Technical Papers. AIP. 37 (1): 1079–82. doi:10.1889/1.2433159. S2CID 129569963.

This TFT kit comprises one of our smallest TFT displays and an adapter board that breaks the tail connections out to a simple 2x5 10-position header. The adapter board includes a backlight driver, so only a single 3.3v power input is required to bring up the display.

The traditional mechanical instrument lacks the ability to satisfy the market with characters of favorable compatibility, easy upgrading, and fashion. Thus the design of a TFT-LCD (thin film transistor-liquid crystal display) based automobile instrument is carried out. With a 7-inch TFT-LCD and the 32-bit microcontroller MB91F599, the instrument could process various information generated by other electronic control units (ECUs) of a vehicle and display valuable driving parameters on the 7-inch TFT-LCD. The function of aided parking is also provided by the instrument. Basic principles to be obeyed in circuits designing under on-board environment are first pointed out. Then the paper analyzes the signals processed in the automobile

instrument and gives an introduction to the sampling circuits and interfaces related to these signals. Following this is the functional categorizing of the circuit modules, such as video buffer circuit, CAN bus interface circuit, and TFT-LCD drive circuit. Additionally, the external EEPROM stores information of the vehicle for history data query, and the external FLASH enables the display of high quality figures. On the whole, the accomplished automobile instrument meets the requirements of automobile instrument markets with its characters of low cost, favorable compatibility, friendly interfaces, and easy upgrading.

As an essential human-machine interface, the automobile instrument provides the drivers with important information of the vehicle. It is supposed to process various information generated by other ECUs and display important driving parameters in time, only in which way can driving safety be secured. However, the traditional mechanical automobile instrument is incompetent to provide all important information of the vehicle. Besides, the traditional instrument meets great challenge with the development of microelectronic technology, advanced materials, and the transformation of drivers’ aesthetics [1, 2]. Moreover, the parking of the vehicle is also a problem puzzling many new drivers. Given this, traditional instruments should be upgraded in terms of driving safety, cost, and fashion.

The digital instrument has functions of vehicle information displaying, chord alarming, rear video aided parking, LED indicating, step-motor based pointing, and data storage. The instrument adopts dedicated microcontroller MB91F599, a 7-inch LCD, and two step-motors to substitute for the traditional instrument. All the information generated by other ECUs can be acquired via not only the sample circuits but also the CAN bus.

The instrument provides interfaces for different types of signals and the CAN bus. All types of signals (such as square wave signal, switching signal, resistance signal, analog voltage signal, etc.) coming from other ECUs can be acquired either from different types of sampling circuits or from the CAN bus. This makes it suitable for both the outdated application where the information from other ECUs can only be acquired via the sampling circuits and the modern application where the information from other ECUs are transmitted via the CAN bus.

The CAN bus interface and the 7-inch TFT-LCD make it more convenient to upgrade the instrument without changing the hardware. If the software needs to be upgraded, we need not bother to take the instrument down and program the MCU. Instead, we can upgrade the instrument via the vehicle’s CAN network without taking the instrument down, which makes the upgrading more convenient. Most of the information from other ECUs can be transmitted via the CAN bus; so, we do not have to change the hardware circuits if some of the ECUs’ signals are changed in different applications. Besides, since most of the driving parameters are displayed on the TFT-LCD, and the graphical user interface can be designed with great flexibility by programming, only the software needs to be revised to meet different requirements of what kind of driving parameters to display and so forth. These characters, together with the reserved interfaces, enhance the instrument’s compatibility in different applications.

On the one hand, there are some automobile instruments which adopt 8-bit MCUs or 16-bit MCUs which have limited peripherals, so it is difficult for them to meet some requirements such as rearview video and high real-time data processing performance. And many extra components are needed if the designer wants to accomplish some functions such as video input. On the other hand, there are some advanced automobile instruments which adopt high performance MCUs (such as i.MX 53, MPC5121e, and MPC5123) and run Linux on them. They even use larger TFT-LCDs (such as the 12.3-inch TFT-LCD with a resolution of 1280 × 480 pixels) to display driving parameters. These automobile instruments show higher performances than the instrument in this paper. However, they are more expensive than this automobile. This instrument is able to provide almost all the functions of the advanced automobile instrument with a lower cost.

The instrument receives signals from other ECUs via the sampling circuits or the CAN bus interface. It can also receive commands from the driver via the button interface. The signals are then processed by the MCU, after which the MCU may send the vehicle information to the LCD or light the LEDs and so forth, according to the results. Therefore, the automobile instrument can be viewed as a carrier of the information flow. And the design of the system can be viewed from two aspects: the hardware system and the information flow based on it.

From the aspect of hardware system components, the system consists of the MCU MB91F599 and other functional circuits such as sampling circuits and video buffer circuits, as shown in Figure 2.

Overvoltage protection circuits should be placed at the interfaces of power supply and important signals (such as the CAN bus interface) in case of voltage overshoots.3.1.3. Generality

The automobile instrument receives and processes information from other ECUs such as the tachometer, the speedometer, the cooling water temperature gauge, the oil pressure gauge, and the fuel gauge. The signals coming from these ECUs are of different types, according to which different kinds of sampling circuits and interfaces should be designed. Accordingly, a classification of the input signals is first carried out, as shown in Table 1.

Square wave signal is the signal that comes from the tachometer. The engine speed, the velocity of the vehicle, and the mileage are proportional to the frequency of the square wave signal. However, the square wave is not “standard” because it is often corrupted by interferences. Besides, the peak voltage of the square wave is +12 V while the I/O voltage of the microcontroller is . The main task for the circuits is to remove the interferences and convert the +12 V voltage to . As shown in Figure 3, the square wave signal is input from node ②; node ① is connected to one pin of the microcontroller.

The switching signal acts as a trigger signal to trigger some events such as lighting up the backlight and waking up the MCU. It can be categorized into active high and active low according to the ECUs that generate it. Figure 4 offers a complete picture of the sampling circuit of active high signal. The switching signal is input from node ②; node ① is connected to one pin of the microcontroller. Diode clamps the peak voltage of the switching signal (usually +12 V) to the standard I/O voltage of the microcontroller () after resistive subdivision. The sampling circuit of active low signal is similar to Figure 4.

The analog voltage signal reflects the battery voltage and the air pressure. The corresponding circuit adopts the resistive subdivision so as to adjust the ratio of the resistors for putting voltage of the signal below the microcontroller’s maximum I/O voltage. The value of the resistors should be a little larger to lower down the static power consumption of the resistors. It is unnecessary to go into detail of the circuit.

The rearview video contributes a lot to vehicle backing and parking. The signal coming from the rear camera must be regulated before being processed by the microcontroller. The rear camera outputs NTSC video. The MB91F599 integrates a video decoder which supports NTSC/PAL video input, which makes the design of the regulatory circuit simple.

Figure 6 shows RGB with sync in NTSC format. The RGB varies in a positive direction from the “black level” (0 V) to 700 mV. Meanwhile, a sync waveform of −300 mV is attached to the video signal. Since the output video signal of the camera is AC-coupled, a clamp circuit is needed to clamp the RGB and sync to a reference voltage and leave the others to vary. If not clamped, the bias voltage will vary with video content and the brightness information will be lost [5].

The video buffer circuit consists of a clamping circuit (, , ) and an emitter follower (, , ), as shown in Figure 7. Node ① is connected to the NTSC input pin of the microcontroller; node ② is connected to the clamp level output pin of the microcontroller; node ③ is connected to the camera’s signal output. is the coupling capacitor; is the matching resistor to realize the 75 Ω back termination.

Since the FLASH size of the microcontroller is only 1 MB which is limited for the storage of pictures displayed on the LCD, external FLASH is needed to store different kinds of meaningful pictures such as the background of the dial. Two S29GL256N chips with a memory capacity of 256 Mb are chosen for picture data storage for their high performance and low power consumption. The application circuits of the chips are provided in their datasheets, so it is unnecessary to go into the details of them here.

For this design, only the CAN transceiver and its auxiliary circuit are needed since the MB91F599 is integrated with two CAN controllers, which are connected to the high-speed and low-speed CAN bus, respectively. TJA1040 is chosen as the CAN transceiver for its low consumption in standby mode. Besides, it can also be woken up via CAN bus, which is required by some automobile instruments. Detailed circuit is provided in the datasheet of TJA1040, so the repetitious details need not be given here. Note that for high-speed CAN, both ends of the pair of signal wires must be terminated. ISO 11898 requires a cable with a nominal impedance of 120 Ω [19]; therefore, 120 Ω resistors are needed for termination. Here, only the devices on the ends of the cable need 120 Ω termination resistors.

The 7-inch TFT-LCD has a resolution of pixels and supports the 24-bit for three RGB colors. The interface of the 60-pin TFT-LCD can be categorized into data interface, control interface, bias voltage interface, and gamma correction interface.

The data interface supports the parallel data transmitting of 18-bit (6 bits per channel) for three RGB colors. Thus, a range of colors can be generated. The control interface consists of a “horizontal synchronization” which indicates the start of every scan line, a “vertical synchronization” which indicates the start of a new field, and a “pixel clock.” This part is controlled by the graphics display controller which is integrated in the MB91F599. We just need to connect the pins of the LCD to those of the microcontroller correspondingly.

Bias voltages are used to drive the liquid crystal molecules in an alternating form. The compact LCD bias IC TPS65150 provides all bias voltages required by the 7-inch TFT-LCD. The detailed circuit is also provided in the datasheet of TPS65150.

The greatest effect of gamma on the representations of colors is a change in overall brightness. Almost every LCD monitor has an intensity to voltage response curve which is not a linear function. So if the LCD receives a message that a certain pixel should have certain intensity, it will actually display a pixel which has intensity not equal to the certain one. Then the brightness of the picture will be affected. Therefore, gamma correction is needed. Several approaches to gamma correction are discussed in [20–22]. For this specific 7-inch LCD, only the producer knows the relationship between the voltage sent to the LCD and the intensity it produces. The signal can be corrected according to the datasheet of the LCD before it gets to the monitor. According to the datasheet, ten gamma correction voltages are needed. These voltages can be got from a resistive subdivision circuit.

The vehicle electric power system is mainly composed of a generator and a battery [23]. The power voltage of a car is +12 V while that of a bus is +24 V. The power supply of the automobile instrument alternates between the generator and the battery. The generator powers the automobile instrument and charges the battery when working. Note that the battery does not power the instrument when the generator is on. If the generator is not working, the instrument is powered by the battery. Figure 9 shows how the power supply alternates. Node ① is connected to the battery; node ② is connected to the generator; node ③ is connected to other circuits. When the generator is on, and are turned off, which prevents node ③ from getting power from the battery. Then node ③ gets power from the generator via other routes (not shown in the figure). When the generator is off, and are turned on, so node ③ gets power from the battery.

For this instrument, the LED indicators, the backlight, and the chord alarm need to be supplied with a voltage of +12 V; the CAN transceiver, the EEPROM, and the buttons need to be supplied with a voltage of +5 V; the video buffer circuit, the external FLASH, and the data interface of the LCD need to be supplied with a voltage of +3.3 V. Besides, the microcontroller needs to be supplied with voltages of +5 V and +3.3 V simultaneously. Figure 8 offers a detailed block diagram of the power supply for the automobile instrument.

The main task for the program is to calculate the driving parameters of the vehicle and display them on the TFT-LCD. The calculation is triggered by the input signals via the sampling circuits or the CAN bus. The main program flow chart of the system is shown in Figure 10.

The design scheme of a TFT-LCD based automobile instrument is carried out form aspects of both the hardware and the main program flow chart. The MB91F599 simplifies the peripheral circuits with its rich on-chip resources and shows high performance in real-time data processing. The automobile instrument is capable of displaying the velocity of the vehicle, the engine speed, the cooling water temperature, the oil pressure, the fuel volume, the air pressure, and other information on the TFT-LCD, which contributes a lot to driving safety and satisfies drivers’ aesthetics. Besides, the rearview video makes the parking and backing easier and safer for the driver. Moreover, the CAN bus interface and TFT-LCD make it easier for the upgrading of the instrument without changing the hardware, thus saving the cost.

G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source

G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source

G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

There is disclosed a gate driver, a driving circuit, and a liquid crystal display (LCD), wherein the gate driver comprises input terminals for inputting a CPV signal, an OE signal, and an STV signal, and output terminals for outputting a CKV signal and a CKVB signal, and a processing circuit is connected between the input terminals and the output terminals for processing the CPV signal, the OE signal, and the STV signal such that a preset time interval is present between the falling edge of the CKV signal and the rising edge of the CKVB signal during one period of the CKV signal, or a preset time interval is present between the rising edge of the CKV signal and the falling edge of the CKVB signal during one period of the CKVB signal.

A LCD is a flat plate display commonly used currently, and a thin film transistor liquid crystal display (TFT-LCD) is the mainstream product of the LCD. FIG. 1 is a schematic structural diagram showing a driving circuit for a TFT-LCD in the prior art, in which a timing controller 1 is used to generate various controlling signals, such as a gate line turning-on signal which is usually referred to as the Clock Pulse Vertical (CPV) signal in the art, a gate frame turning-on signal which is usually referred to as the Start Vertical (STV) signal in the art, a gate output enabling signal which is usually referred to as the Output Enable (OE) signal, etc. The timing controller 1 inputs the various controlling signals generated into a high voltage TFT-LCD logic driver 2, which generates a first clock signal which is usually referred to as the CKV signal in the art, a second clock signal which is usually referred to as the CKVB signal in the art, and an improved STV signal which is usually referred to as the STVP signal by the SPV signal, the STV signal and the OE signal ect. The improved STV signal refers to an STV signal for which the level has been adjusted. Since the level of the STV signal output from the timing controller may not coincide with the level of the STV signal required by the gate driving circuit, it is required to convert the level of the STV signal by some level converting circuits. It is possible to drive the gate by inputting the CKVB signal, the CKV signal, and the STVP signal into a gate driving circuit 3.

In a driving circuit for a TFT-LCD, when the gate driving circuit outputs a gate driving signal, which is usually referred to as the Gate signal, to turn on a row of gate lines, usually a source driving circuit inputs the data signals of the respective pixels corresponding to the row of gate lines onto the respective pixel electrodes of the row. In other words, when the Gate signal is of a high level, the source driving circuit inputs the data signals into the pixel electrodes. In a practical application, the falling edge of the Gate signal delays, therefore, when the Gate1 signal of the current row is in its falling edge, the Gate2 signal of the next row has already started to rise. In other words, the source driving circuit inputs the data corresponding to the next row of pixels before the respective TFTs corresponding to the previous row of gate lines are turned off, which results in a mix with the data of the previous row of pixels and influences the quality of the image display. SUMMARY

The present disclosure provides a gate driver, a driving circuit, and a liquid crystal display (LCD) for avoiding the mix of the data input into the pixel electrodes due to the delay of the gate driving signal.

An embodiment of the disclosure provides a gate driver, comprising input terminals for inputting a CPV signal, an OE signal, and an STV signal, and output terminals for outputting a CKV signal and a CKVB signal, wherein a processing circuit is connected between the input terminals and the output terminals for processing the CPV signal, the OE signal, and the STV signal such that a preset time interval is present between the falling edge of the CKV signal and the rising edge of the CKVB signal during one period of the CKV signal, or a preset time interval is present between the rising edge of the CKV signal and the falling edge of the CKVB signal during one period of the CKVB signal.

In an example, the processing circuit comprises a NOT gate L1, a D flip-flop D1, a first AND gate L2, a second AND gate L3, a first logic combination circuit C1, a first logic selection circuit L4, and a second logic selection circuit L5, wherein the input terminal of the NOT gate L1 is connected to the input terminal of the OE signal; the output terminal of the NOT gate L1 is connected to both the input terminal of the first AND gate L2 and the input terminal of the second AND gate L3; the triggering terminal CKV of the D flip-flop D1 is connected to the CPV signal input terminal; the input terminal D of the D flip-flop D1 is connected to the inverse output terminal Q; the inverse output terminal Q of the D flip-flop D1 is connected to the input terminal of the second AND gate L3; the output terminal Q of the D flip-flop D1 is connected to the input terminal of the AND gate L2; the reset terminal RST of the D flip-flop D1 is connected to the STV signal input terminal; the input terminals of the first logic combination circuit C1 are connected to the CPV signal input terminal, the output terminal of the first AND gate L2, and the output terminal of the second AND gate L3, respectively; the output terminals of the first logic combination circuit C1 are connected to the first logic selection circuit L4 and the second logic selection circuit L5, respectively; the output terminal of the first logic selection circuit L4 is connected to the CKV signal output terminal; the output terminal of the second logic selection circuit L5 is connected to the CKVB signal output terminal; the first logic selection circuit L4 and the second logic selection circuit L5 are connected to a high selective reference voltage VON and a low selective reference voltage VOFF, respectively.

Another embodiment of the present disclosure provides a driving circuit, comprising a source driver and a gate driver, wherein, the gate driver adopts the gate driver described above.

Still another embodiment of the present disclosure provides a TFT-LCD, comprising a frame, a liquid crystal display panel, and a driving circuit, wherein the driving circuit adopts the driving circuit.

According to the gate driver, the driving circuit, and the TFT-LCD provided according to embodiments of the present disclosure, by converting the STV signal, the OE signal, and the CPV signal in the prior art into the CKV signal and the CKVB signal through the processing circuit, the falling edge of the CKV signal can be displaced from the rising edge of the CKVB signal by a certain time during one period of the CKV signal, or the falling edge of the CKVB signal can be displaced from the rising edge of the CKV by a certain time during one period of the CKVB signal, such that the mix of the data input into the pixel electrodes due to the delay of the gate driving signal is avoided.

FIG. 2 is a schematic structural diagram of a gate driver for a TFT-LCD according to a first embodiment of the present disclosure. As shown in FIG. 2, the gate driver for the TFT-LCD according to the present disclosure may comprise input terminals for inputting a CPV signal, an OE signal, and an STV signal, and output terminals for outputting a CKV signal and a CKVB signal. A processing circuit is connected between the input terminals and the output terminals for processing the CPV signal, the OE signal, and the STV signal such that a preset time interval is present between the falling edge of the CKV signal and the rising edge of the CKVB signal during one period of the CKV signal, or a preset time interval is present between the rising edge of the CKV signal and the falling edge of the CKVB signal during one period of the CKVB signal.

Specifically, the input terminals INPUT may comprise the CPV signal input terminal, the OE signal input terminal, and the STV signal input terminal. The output terminals OUTPUT may comprise the CKV signal output terminal and the CKVB signal output terminal. In an example, the processing circuit may comprise a NOT gate L1, a D flip-flop D1, a first AND gate L2, a second AND gate L3, a first logic combination circuit C1, a first logic selection circuit L4, and a second logic selection circuit L5, wherein,

the input terminals of the first logic combination circuit C1 are connected to the CPV signal input terminal, the output terminal of the first AND gate L2, and the output terminal of the second AND gate L3, respectively;

the output terminals of the first logic combination circuit C1 are connected to the first logic selection circuit L4 and the second logic selection circuit L5, respectively;

the first logic selection circuit L4 and the second logic selection circuit L5 are connected to a high selective reference voltage VON and a low selective reference voltage VOFF, respectively.

In FIG. 2, the input terminal D, the output terminal Q, the inverse output terminal Q, and the reset terminal RST of the D flip-flop D1 are well known in the field of the electronic circuit, and will not be discussed here in detail.

The operating principle of the gate driver for the TFT-LCD according to the embodiments of the present disclosure is described below. In FIG. 2, when the CPV signal rises to a high level, because the input terminal D of the D flip-flop D1 is connected to the inverse output Q, the CPV signal inverts the output of the D flip-flop D1 as an edge-triggering signal, which then inverts the output of the first logic combination circuit C1, switches the level of the first logic selection circuit L4 and the second logic selection circuit L5, and further inverts the phases of the CKV signal and the CKVB signal, resulting in a line switching of the Gate signal inputted into the gates. The OE signal is introduced into the circuit by the first logic AND gate L2 and the second AND gate L3. When the OE signal rises to the high level, the signal becomes low after passing through the NOT gate L1, and the output signals of both the first AND gate L2 and the second AND gate L3 are in a low level. The signals from the first AND gate L2 and the second AND gate L3, after passing though the first logic combination circuit C1, make the output signals of both the first logic selection circuit L4 and the second logic selection circuit L5 connect to the low voltage VOFF, that is, the CKV signal and the CKVB signal both output the low voltage VOFF. Therefore, a preset time interval is present between the falling edge of the CKV signal and the rising edge of the CKVB signal during one period of the CKV signal, or a preset time interval is present between the rising edge of the CKV signal and the falling edge of the CKVB signal during one period of the CKVB signal, resulting in that the gates are turned off at an expected time.

FIG. 3 is a timing diagram for the gate driver for the TFT-LCD according the first embodiment of the present disclosure. As shown in FIG. 3, the STV signal, the OE signal, and the CPV signal are input signals, and the CKV signal and the CKVB signal are output signals. Conventionally, a Gate signal is output at both the rising edge of the CKV signal and the rising edge of the CKVB signal. The period of the CKV signal is the same as that of the CKVB signal, and their rising edges arise alternately, so as to output the gate driving signals for respective rows of gate lines in turn. As seen from FIG. 3, the falling edge of the OE signal corresponds to the rising edge of the CKV signal or the CKVB signal. However, during one period of the CKV signal, a time interval which is the high voltage maintaining time within one period of the OE signal exists between the falling edge of the CKV signal and the rising edge of the CKVB signal, and during one period of the CKVB signal, the time interval which is the high voltage maintaining time within one period of the OE signal also exists between the falling edge of the CKVB signal and the rising edge of the CKV signal. Therefore, even though the delay of the falling edge of the CKV signal and the falling edge of the CKVB signal causes the delay of the falling edge of the Gate signal, the data will not be mixed, and the quality of the image displaying is ensured.

Further, the output terminals according to the embodiment can also be used to output the STVP signal, i.e. comprise an STVP signal output terminal. Accordingly, in another example, the processing circuit can further comprise a second logic combination circuit C2 and a second logic selection circuit L6, wherein,

the input terminals of the second logic combination circuit C2 are connected to the CPV signal input terminal and the STV signal input terminal, respectively;

the third logic selection circuit L6 is connected to the high selective reference voltage VON and the low selective reference voltage VOFF. In particular, the STV signal is level-converted to generate the STVP signal by the third logic selection circuit L6, in order to charge the first row of gate lines.

In the embodiment, by generating the CKV signal and the CKVB signal with the STV signal, the OE signal, and the CPV signal in the prior art through the processing circuit, the falling edge of the CKV signal is displaced from the rising edge of the CKVB by a certain time during one period of the CKV signal, or the falling edge of the CKVB signal is displaced from the rising edge of the CKV signal by a certain time during one period of the CKVB signal, such that the mix of the data input into the pixel electrodes due to the delay of the gate driving signal is avoided.

The present disclosure also provides a driving circuit for a TFT-LCD, which comprises a source driver and a gate driver. The gate driver adopts the gate driver for the TFT-LCD according to the above-described embodiment.

wherein a processing circuit is connected between the input terminals and the output terminals for processing the CPV signal, the OE signal, and the STV signal such that a preset time interval is present between the falling edge of the CKV signal and the rising edge of the CKVB signal during one period of the CKV signal, or a preset time interval is present between the rising edge of the CKV signal and the falling edge of the CKVB signal during one period of the CKVB signal.

2. The gate driver according to claim 1, wherein the processing circuit comprises a NOT gate L1, a D flip-flop D1, a first AND gate L2, a second AND gate L3, a first logic combination circuit C1, a first logic selection circuit L4, and a second logic selection circuit L5, wherein, the input terminal of the NOT gate L1 is connected to the input terminal of the OE signal;

the input terminals of the first logic combination circuit C1 are connected to the CPV signal input terminal, the output terminal of the first AND gate L2, and the output terminal of the second AND gate L3, respectively;

the output terminals of the first logic combination circuit C1 are connected to the first logic selection circuit L4 and the second logic selection circuit L5, respectively;

the first logic selection circuit L4 and the second logic selection circuit L5 are connected to a high selective reference voltage VON and a low selective reference voltage VOFF, respectively.

3. The gate driver according to claim 1, wherein the output terminals are also used to output an STVP signal; and the processing circuit further comprises a second logic combination circuit C2 and a second logic selection circuit L6, wherein

the input terminals of the second logic combination circuit C2 are connected to the CPV signal input terminal and the STV signal input terminal, respectively;

7. A thin film transistor liquid crystal display (TFT-LCD), comprising a frame, a liquid crystal display panel, and a driving circuit, wherein the driving circuit adopts the driving circuit according to claim 5.

Level shifter circuit and method for controlling voltage levels of clock signal and inverted clock signal for driving gate lines of amorphous silicon gate-thin film transistor liquid crystal display

Level shifter circuit and method for controlling voltage levels of clock signal and inverted clock signal for driving gate lines of amorphous silicon gate-thin film transistor liquid crystal display

Level shifter circuit and method for controlling voltage levels of clock signal and inverted clock signal for driving gate lines of amorphous silicon gate-thin film transistor liquid crystal display